Virtual mem questions....
Verification Engineer Interview Questions
3,718 verification engineer interview questions shared by candidates
Calculate address lines required for memory. Puzzle . FIFO verification test cases. Why computer engineering
Basics of computer architecture, verification, data structures, rtl logic Telephonic interview was basics of RTL design
question on packet transfer inside of test bench from generator to driver... (system verilog concepts)
Perl questions, Propose test plan for round robin arbiter
Given an async fifo, tell the testplan --> complicated fifo with lot of requirements..(writes are done by 3 masters. there is an arbiter).
1. How to verify a memory 2. MOESI cache protocol
what is blocking and non blocking?
Write a logic to find a maximum number among the three given numbers.
There were 4 rounds - 3 technical and 1 HR.
Viewing 2401 - 2410 interview questions