how do you know you have cover all the case in your testbench
Verification Engineer Interview Questions
3,718 verification engineer interview questions shared by candidates
question on packet transfer inside of test bench from generator to driver... (system verilog concepts)
Write a logic to find a maximum number among the three given numbers.
There were 4 rounds - 3 technical and 1 HR.
Qu’est ce qu’il y a dans un processeur?
Explain Cache and pipeline, how they work?
Find the depth of a binary tree
They asked to code using Verilog.
Given an async fifo, tell the testplan --> complicated fifo with lot of requirements..(writes are done by 3 masters. there is an arbiter).
1. How to verify a memory 2. MOESI cache protocol
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