working env is to good in the main office.
Verification Engineer Interview Questions
3,713 verification engineer interview questions shared by candidates
Verilog code for the clock divider
Node insertion in linked list. Fibonacci series function, hardware to generate Fibonacci series, prime number generation hardware , STA concepts, clock domain crossing, use of synchronizes, skew and setup hold time violation.
Explain past work experience and Project details.
Since the interview was for a hardware position, they asked more software related questions than I expected but were all easy
about gates basic concepts of c and java
Calculation of fifo depth for buffer from cpu to memory
What are some specific challenges you've faced in your current job, and how did you work through overcoming them?
Describe what a memory array looks like, what a sense amp generally does, and what an equilibration circuit does.
How do you construct a NOR gate only from NAND gates?
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