Why are you leaving your previous organization
Asic Engineer Interview Questions
1,316 asic engineer interview questions shared by candidates
What is setup and hold?
How to synchronize a clock in two different time domain? Hold/setup time violation and how to fix? Questions from timing analysis
I was asked to describe the projects I had done related to VHDL, ASIC design etc. After that I was questioned about debugging the RTL code.
Questions mostly related to semiconductor processes and techniques
how PTV affects performance
diff between false path and multi cycle path
Tell about Your self and some other related questions.
Smooth interview. Happened online interview. Three rounds of interview were there. One round of written test, two rounds of technical tests. Sta, physical design, asic design flow, digital, complementary metal oxide semi conductor questions.
Write RTL code for a fifo.
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