How do you overcome CDC issues? Detailed questions on each method
Asic Engineer Interview Questions
1,316 asic engineer interview questions shared by candidates
all about resume, STA, DFT, Pipelining
Personal research, DVFS, CDC, metastable, asynchronous FIFO, synchronizer, level shifter, clock gating, power gating, dynamic power, leakage power.
Explain Setup and hold for a latch.
Design a state machine to detect bit sequence. How do you verify it?
How to make nor gate using two input mux
Raised Cosine Filter; roll--off factor; 100 doors puzzle
transistor sizing for a NAND gate
Design a FIFO hardware
False paths and Multiple cycle path examples.
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