explain Fpga design flow
Fpga Development Engineer Interview Questions
681 fpga development engineer interview questions shared by candidates
What is your biggest strength
We talked about my own project and the possibilities for its development.
How to solve setup and hold time violation, Name few techniques. Write RTL code for shift register. How to handle clock domain crossing and name few techniques. How to do floor planning. Write a RTL code latch. Design a circuit to detect 1ns asynchronous signal. What is name space in python. How to constrain asynchronous signal. When to use set max delay.
What is the most challenging project you worked on in your career?
Walk through past designs, clock crossings, some scenarios just the usual but nothing that was out of line for the position
explain about ur projects??
Bus protocols like SPI, ARM etc
They give me an online assignment. It has 30+ multiple-choice questions, and 4 VHDL programming questions. The theoretical part covers a lot in the FPGA development, about logic unit consumption and state machine. Some of them I know I learnt before but cannot remember the solutions.
What you have written in the resume, is it true? About my project on DSP: Have you worked on DSP algorithm? Was it on Xilinx FPGA or Altera?
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