Sorting, bit logic
Verification Design Engineer Interview Questions
3,719 verification design engineer interview questions shared by candidates
What is crosstalk? Ways to fix crosstalk? Relationship between Resistance/Capacitance to Length & Width What is charge sharing? How to fix? What is body effect? What is short channel effect? List several effects.
First Round: 1. AND and OR gate using 2:1 Mux 2. Single line logic to check if a number is a power of 2 3. Working of in-order pipeline 4. Inputs to the program counter in an in-order pipeline 5. Working of a Branch Predictor and operations on it 6. Converting the in-order pipeline to an out-of-order pipeline 7. Register renaming and examples of memory disambiguation 8. Recursive function to find factorial of a number Second Round: 1. Project implementation details from resume 2. Function to perform binary search, first using iterations and then using recursion - also, how to terminate the recursion if the key is not found
What is the scope of a static variable? Given multiple scenarios(static variables across files, in recursion, ect.)
Leetcode easy questions were asked
class A; function int foo(); int a; return ++a; endfunction endclass program tb; A a; int b, c; initial begin for(int i = 0; i < 10; i++) begin b = a.foo(); c = foo(); $display("B = %0d", b); $display("C = %0d", c); end end function int foo(); int a; return ++a; endfunction
what is your research area?
First interview - I was asked to write pseudo code for memory allocation (like malloc/free). Second interview - I was asked to describe verification environment for a FIFO, considering sync/async. And to write a UVM monitor.
If you had to choose between two vacuums, same price, what would be some of the things you would consider?
what is a uvm agent?
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