Asic Verification Engineer Interview Questions

273 asic verification engineer interview questions shared by candidates

You have 2 pieces of rope, each of which burns from one end to the other in 30 minutes (no matter which end is lit). If different pieces touch, the flame will transfer from one to the other. You cannot assume any rope properties that were not stated. Given only 1 match, can you time 45 minutes?
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ASIC Verification Engineer

Interviewed at Zoran

3.7
Sep 9, 2010

You have 2 pieces of rope, each of which burns from one end to the other in 30 minutes (no matter which end is lit). If different pieces touch, the flame will transfer from one to the other. You cannot assume any rope properties that were not stated. Given only 1 match, can you time 45 minutes?

1st is HR, ask about why Nvidia? expected salary, immigration status, graduation date, etc. 2nd ask about verification methodology (UVM, OVM), system verilog (passing obj as function argument, different type of fork-join, polymorphism etc), use and function of interface in testbench. 3rd ask about arbiter design, setup/hold time, basic logic design, 4rd ask about programming (how to find loops in a linked list), basic C programming and divide by 3 divider. 5th is hiring manager, talk about positions, teams and their products. ask about basic logic design, verilog(syn, asyn, blocking, non-blocking), transistor level design of registers and what could be problem with that design. 6th dude is a funny guy who ask about nothing but just keep talking about the team, what he has done and what he like and don't like about his job, etc. Most difficult: design divide by 3 divider with 50% duty cycle, I don't know how to do that, and the recruiter change the duty cycle to 66%, and I finished it.
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ASIC Verification Engineer NGC

Interviewed at NVIDIA

4.4
Mar 13, 2013

1st is HR, ask about why Nvidia? expected salary, immigration status, graduation date, etc. 2nd ask about verification methodology (UVM, OVM), system verilog (passing obj as function argument, different type of fork-join, polymorphism etc), use and function of interface in testbench. 3rd ask about arbiter design, setup/hold time, basic logic design, 4rd ask about programming (how to find loops in a linked list), basic C programming and divide by 3 divider. 5th is hiring manager, talk about positions, teams and their products. ask about basic logic design, verilog(syn, asyn, blocking, non-blocking), transistor level design of registers and what could be problem with that design. 6th dude is a funny guy who ask about nothing but just keep talking about the team, what he has done and what he like and don't like about his job, etc. Most difficult: design divide by 3 divider with 50% duty cycle, I don't know how to do that, and the recruiter change the duty cycle to 66%, and I finished it.

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