1. UVM phases and which is task and which is function
Verification Design Engineer Interview Questions
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Basics of Networking. programming . Projects
Write a verilog code to design synchronous counter using verilog
Mostly related to VLSI domain.
Data Structures questions Bit allocation questions Stack and heap design questions.
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Write C code for Fibonacci series using recursion. Write c code for swapping 2 nos without using any other variables.
Basics of verilog and sv
use non-blocking assignment to implement negative clock triggering SWAP in verilog, read the code
Even ask me many questions about C++ and OOP.
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