Node insertion in linked list. Fibonacci series function, hardware to generate Fibonacci series, prime number generation hardware , STA concepts, clock domain crossing, use of synchronizes, skew and setup hold time violation.
Asic Design Verification Engineer Interview Questions
273 asic design verification engineer interview questions shared by candidates
Explain past work experience and Project details.
pass by value, pass by ref, function in c for fibonacci, pattern detector fsm, pipeline hazard
Scripting questions on 2D hashes and asked for coding in perl/python. Basic questions on STA
I don't remember the question clearly but something that had to do with implementing some methods in a (UVM-like) Scoreboard class.
All questions were related to my previous experience, testing methodology, and problem solving skills. They also asked some basic oo concepts
Basic computer architecture questions, pipeline concepts and hazards. FSM for a sequence detector. Fibonacci using recursion and linked list reversal. Some scripting question which i could not answer.
My previous experience, as well as a few mock examples related to verification and what my process would be
I don't think the questions are difficualt. Some coding related questions I didn't answered well, mainly because my passed experiences are more focusing on the hw design, not sw coding.
There are block box modules, and you know nothing about what they are doing, behaior, output, input. Can you create a verification TB for it?
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