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90 characterization engineer interview questions shared by candidates

> When does a metal become a transmission line; answer is t rise > 6 Tdelay > given values of transmission line impedance, driver impedance and load impedance was asked to calculate reflection co-efficients at source and load, transmission co-efficient > what happens if source/ load impedances are not matched with transmission line impedance > how to reduce ringing > explain cross talk with a given scenario and ways to reduce it; both due to inductance and cap > ground bounce; how will you reduce it > inverter sizing; why do we size in that fashion > verilog behavioral and non-behavioral and what is the hw implemented in each case > implement a counter counting upto 10 in verilog > from resume; explain about the PLL that you have designed
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High Speed Characterization

Interviewed at Qualcomm

3.8★
Aug 16, 2013

> When does a metal become a transmission line; answer is t rise > 6 Tdelay > given values of transmission line impedance, driver impedance and load impedance was asked to calculate reflection co-efficients at source and load, transmission co-efficient > what happens if source/ load impedances are not matched with transmission line impedance > how to reduce ringing > explain cross talk with a given scenario and ways to reduce it; both due to inductance and cap > ground bounce; how will you reduce it > inverter sizing; why do we size in that fashion > verilog behavioral and non-behavioral and what is the hw implemented in each case > implement a counter counting upto 10 in verilog > from resume; explain about the PLL that you have designed

on-site interview questions: First Round: with HR. This is just a discussion about the position. Why did you apply for this position? Why this company Salary expectations Do you know anybody in this company Tell me about yourself Second Round: 1. Find the change in voltage in the bit line while reading in a DRAM cell. 2. Working of NMOS, like depletion, inversion with diagram 3. Vt dependence on Vb 4. DRAM operation 5. Test program flow ( this is from my internship) 6. About PVT corners. In the SS, FF, what is "S" what is the meaning. Discussed the position. Third Round: 1. Explain about structs, virtual functions, polymorphism, operator overloading (C++) How do you rate yourself in C/C++ 2. Explain about your internship 3. UNIX: grep and find commands 4. Inverter o/p characteristics 5. DRAM working 6. Some questions about ATE Fourth Round: 1. About my internship 2. Design a circuit to find if two numbers are equal. Two numbers are 8 bits each. 3. Two capacitors connected in series. First one is connected to Vdd and the second one to gnd. What is the voltage across the second one? 4. Find Setup and hold time for the circuit. What extra delay should be added to avoid hold violation? 5. One scenario ATE. How will you solve the problem? 6. Where do you use SRAM, DRAM. The difference between them. 7. What are ATE AC and DC parameters? Fifth Round: 1. So many questions about internship 2.Explain set-up time. 3.Problems of sending fast signals to ATE input. 4. Explain any one project 5. Asked me to write a full perl script for one scenario. ( not pseudo code) 6. How do you rate yourself in C/C++ Sixth Round: 1. Which project you like most. What is your role. Why did you take that part? 2. What difficulties did you face? How did you overcome? 3.Capacitor charge sharing problem 4. Question on hold time 5.Why this company 6.Why this position 7.What will you bring to the team? 8. How do you think you are good for this position 9. What are the advantages of 7nm (from resume)
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Characterization Engineer

Interviewed at Qualcomm

3.8★
Apr 30, 2017

on-site interview questions: First Round: with HR. This is just a discussion about the position. Why did you apply for this position? Why this company Salary expectations Do you know anybody in this company Tell me about yourself Second Round: 1. Find the change in voltage in the bit line while reading in a DRAM cell. 2. Working of NMOS, like depletion, inversion with diagram 3. Vt dependence on Vb 4. DRAM operation 5. Test program flow ( this is from my internship) 6. About PVT corners. In the SS, FF, what is "S" what is the meaning. Discussed the position. Third Round: 1. Explain about structs, virtual functions, polymorphism, operator overloading (C++) How do you rate yourself in C/C++ 2. Explain about your internship 3. UNIX: grep and find commands 4. Inverter o/p characteristics 5. DRAM working 6. Some questions about ATE Fourth Round: 1. About my internship 2. Design a circuit to find if two numbers are equal. Two numbers are 8 bits each. 3. Two capacitors connected in series. First one is connected to Vdd and the second one to gnd. What is the voltage across the second one? 4. Find Setup and hold time for the circuit. What extra delay should be added to avoid hold violation? 5. One scenario ATE. How will you solve the problem? 6. Where do you use SRAM, DRAM. The difference between them. 7. What are ATE AC and DC parameters? Fifth Round: 1. So many questions about internship 2.Explain set-up time. 3.Problems of sending fast signals to ATE input. 4. Explain any one project 5. Asked me to write a full perl script for one scenario. ( not pseudo code) 6. How do you rate yourself in C/C++ Sixth Round: 1. Which project you like most. What is your role. Why did you take that part? 2. What difficulties did you face? How did you overcome? 3.Capacitor charge sharing problem 4. Question on hold time 5.Why this company 6.Why this position 7.What will you bring to the team? 8. How do you think you are good for this position 9. What are the advantages of 7nm (from resume)

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