Node insertion in linked list. Fibonacci series function, hardware to generate Fibonacci series, prime number generation hardware , STA concepts, clock domain crossing, use of synchronizes, skew and setup hold time violation.
Asic Verification Engineer Interview Questions
273 asic verification engineer interview questions shared by candidates
Explain past work experience and Project details.
pass by value, pass by ref, function in c for fibonacci, pattern detector fsm, pipeline hazard
Scripting questions on 2D hashes and asked for coding in perl/python. Basic questions on STA
I don't remember the question clearly but something that had to do with implementing some methods in a (UVM-like) Scoreboard class.
All questions were related to my previous experience, testing methodology, and problem solving skills. They also asked some basic oo concepts
Basic computer architecture questions, pipeline concepts and hazards. FSM for a sequence detector. Fibonacci using recursion and linked list reversal. Some scripting question which i could not answer.
My previous experience, as well as a few mock examples related to verification and what my process would be
Current project architecture and role. SV and UVM related. SV constraint, coverage, assertions. UVM architecture and flow. Verification strategy related.
where do you see yourself in 5 years
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